Regviz

Espressif Systems /ESP32-P4 /H264_DMA /IN_ETM_CONF_CH2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as IN_ETM_CONF_CH2

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Espressif Systems/ESP32-P4/H264_DMA/IN_ETM_CONF_CH2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IN_ETM_EN_CH2)IN_ETM_EN_CH2 0 (IN_ETM_LOOP_EN_CH2)IN_ETM_LOOP_EN_CH2 0IN_DSCR_TASK_MAK_CH2

Description

RX CH2 ETM config register

Fields

IN_ETM_EN_CH2

Set this bit to 1 to enable ETM task function
IN_ETM_LOOP_EN_CH2

when this bit is 1, dscr can be processed after receiving a task
IN_DSCR_TASK_MAK_CH2

ETM dscr_ready maximum cache numbers

Links

()

Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data